PhD Thesis Defense by Aidana Irmanova, NU PhD Program in Science, Engineering and Technology
Nazarbayev University’s PhD Program in Science, Engineering and Technology is delighted to invite you to the PhD Thesis Defense:
Candidate: Aidana Irmanova, 6th year PhD student
Thesis Title: Memristive Analog Memory for Deep Neural Network Architectures
Lead Supervisor: Prof. Martin Lukac, Dept. of Computer Science, School of Engineering and Digital Sciences, Nazarbayev University, Kazakhstan.
Co-Supervisor: Prof. Prashant Jamwal, Dept. of Electrical and Computer Engineering, School of Engineering and Digital Sciences, Nazarbayev University, Kazakhstan.
External Supervisor: Prof. Bhaskar Choubey, The University of Siegen, Germany.
Chair-Internal Examiner: Prof. Luis Rojas-Solórzano, Dept. of Mechanical and Aerospace Engineering, School of Engineering and Digital Sciences, Nazarbayev University, Kazakhstan.
Internal Examiner: Prof. Mohammad S. Hashmi, Dept. of Electrical and Computer Engineering, School of Engineering and Digital Sciences, Nazarbayev University, Kazakhstan.
External Examiner: Prof. Naoya Onizawa, Research Institute of Electrical Communication, Tohoku University, Japan
Abstract:
Analog switching memristive devices can be used as part of the acceleration block of Neural Network circuits or the part of the building block of neuromorphic architectures at the edge solutions. Ideally, memristive devices are nanoscale, low-power resistive devices that can store an analog continuum of resistive levels with a predictable and stable mechanism of switching. Practically, memristors can be fabricated at the nano-scale, and operate at low power, however, the current state of the art of memristor technology hinders the widespread adoption of memristive neuromorphic circuits due to the system level and device level issues. The device-level issues include the variability aspects of the switching mechanism and endurance-related limitations.
As analog resistive switching is a fragile process, memristors are prone to early aging, precision loss, and variability or errors. System-level issues include the design of the architecture of Neural Network as well as training schemes for fast convergence with the given limitations of the hardware resources. The memory resources are limited by the quantized analog levels of memristors.
In this work, the memristors are used to build an analog memory for deep neural network architectures. For efficient use of memristive devices in neuromorphic circuits, it is required to control the resistive switching process of memristors. Controlling resistive switching enables both off and on-chip training prospects of neural network optimization. In addition, the controlling resistive switching process can be used to spot the malfunctions in the stack of memristor arrays. Such detection methods, on and off-chip training issues as well as quantizing the analog levels of memristive states are discussed in this work.
Date and time: November 17, 2021 (Wednesday) at 1.00 p.m. Nur-Sultan time
The defense will be held on the ZOOM platform. Please make sure that you have installed it on your computers/devices.
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